Yeah risc-v is in the rust supported tiers but xtensa isn’t. I haven’t dug deeply into whether the riscv esp32c3 boards still use some forked rust etc, though, but in theory shouldn’t as it’s a tier 2 architecture.

That said, for my use, it’s entirely transparent this is happening under the covers. Things work as they should in your ESP32 cargo projects as don’t interfere with other targets, and I’ve not found any weird edges. I do however use the c3 boards.